TECHNICAL REPORT On the Design of a Negative Voltage Conversion Circuit
نویسندگان
چکیده
In this work a new embedded negative voltage level converter is presented. The proposed circuit converts a positive input signal to a negative output signal obtaining an increased protection by the high voltage stress on the used MOS devices. This results in higher system reliability in applications where negative pulses are required. The circuit has been designed in a 0.18μm triple-well standard CMOS technology and simulation results are provided to demonstrate the efficiency of the proposed topology. Index Terms – Embedded negative voltage level converter, level shifter, level conversion, MOS devices reliability. Contact Author: Yiorgos Tsiatouhas University of Ioannina Department of Computer Science Panepistimioupolis, P.O. Box. 1186 45110 Ioannina, Greece (Hellas) Tel.: +3
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